Switches Introduction

General

This stage uses two extremely sensitive components, U1 and U2. Be sure to take appropriate ESD (anti-static) precautions when working in this stage.
In fact, if you are building this during the "static season", you might want to put off the build/test steps related to these switches until AFTER completing all the other stages.

This stage provides the two FST 3253 1-4 switches to permit switching a particular band's filter "chain" into or out of the board's outputs. The switches essentially "connect" the Input transformer, via a set of filters, to the output transformer

P102 is not initially implemented. Once the capability to map frequency changes to bands and the interfacing of that to the ATTINY45 are implemented, you will need to connect the outermost pin of JP1 and JP2 tvia a short 2 wire cable to P102 (female 2-pin header) for plugging into J2 of the V9.0 RX
(go directly to build notes)

Switches Schematic

(Resistor testpoints (hairpin, top, or left-hand lead), as physically installed on the board, are marked in the schematic with red dots)

(Click for Full Schematic)
Switchesschematic (go directly to build notes)

Switches Bill of Materials

Stage Bill of Materials

(resistor images and color codes courtesy of WIlfried, DL5SWB's R-Color Code program)

CheckDesignationComponentMarkingCategoryOrientationNotesCircuit
U1FST3253 mux/demux switchFST3253 FST3253SOIC-16 Switches
U2FST3253 mux/demux switchFST3253 FST3253SOIC-16 Switches

Switches Summary Build Notes

Switches Detailed Build Notes

Bottom of the Board

Switches Bottom View

Install FST3253 Switches

Pin 1 is highlighted in the above graphic .

Take care to avoid solder splashovers that can clog up thru-holes for later components. Particularly sensitive sites are indicated in the above graphic by red arrows. If your hands are less than steady, you mat want to insert a toothpick temporarily into the affected thru-hole while soldering in its vicinity.

CheckDesignationComponentMarkingCategoryOrientationNotes
U1FST3253 mux/demux switchFST3253 FST3253SOIC-16 
Take ESD precautions
U2FST3253 mux/demux switchFST3253 FST3253SOIC-16 
Take ESD precautions

Switches Completed Stage

Bottom of the Board

View of Completed Bottom

Switches Testing

ESD

Test Setup

Take ESD precautions when conducting these inspections and tests. The IC switches are extremely sensitive to static damage.

Visual Check

Test Setup

Using very good lighting and magnification, carefully inspect the solder joints to identify bridges, cold joints, or poor contacts.

Pay especial attention to the joints on the two IC's pins. If necessary, touch up the joints with your iron and/or some flux. Wick up any excess.

U1 Continuity Tests (only if necessary)

Test Setup

Normally this test is unnecessary, since the following stage has a simpler, less risky test of the switches' functioning. Conduct this test only in the case that the test in the following stage is not passed. Then, make sure that you have prevented ESD/static discharge via good ESD precautions when conducting this test.

"Continuity" in this case is actually a resistance that is several orders of magnitude below the non-continuity case. Depending upon the ohmmeter, you could see "continuity" indicated by a resistance of between 60 and 90 k ohms; "non-continuity" would be indicated by a resistance of 3 - 6 M ohms.

  • The following tests should only be attempted if you have taken good anti-static, ESD precautions, since the potential exists to completely "fry" the FST 3253. This is especially true during the so-called "static season".
  • Apply 5 Vdc to the board at P101-2 (+5) and P100-3 (ground)
  • For FST 3253 switch U1, measure the continuity between Point X and Points 1, 2, 3, and 4, for each of the appropriate jumper settings on JP1 and JP2
  • The terms "open" and "closed" refer to the jumpered status of JP1 and/or JP2. "Open" means not jumpered.
  • The nominal result of "X ---> 1" means there is continuity between the 2 points. See testpoints graphic below.
U1 Continuity Tests (only if necessary)

Test Measurements

TestpointUnitsNominal ValueAuthor'sYours
JP1&2 Closedk ohmU1: X --->1 (= 70-100)~64_______
JP1 Open, JP2 Closedk ohmU1: X --->2 (= 70-100)~64_______
JP1 Closed, JP2 Openk ohmU1: X --->3 (= 70-100)~64_______
JP1&2 Openk ohmU1: X --->4 (= 70-100)~64_______

U2 Continuity Tests (only if necessary)

Test Setup

Normally this test is unnecessary, since the following stage has a simpler, less risky test of the switches' functioning. Conduct this test only in the case that the test in the following stage is not passed. Then, make sure that you have prevented ESD/static discharge via good ESD precautions when conducting this test.

"Continuity" in this case is actually a resistance that is several orders of magnitude below the non-continuity case. Depending upon the ohmmeter, you could see "continuity" indicated by a resistance of between 60 and 90 k ohms; "non-continuity" would be indicated by a resistance of 3 - 6 M ohms.

  • The following tests should only be attempted if you have taken good anti-static, ESD precautions, since the potential exists to completely "fry" the FST 3253. This is especially true during the so-called "static season".
  • Apply 5 Vdc to the board at P101-2 (+5) and P100-3 (ground)
  • For FST 3253 switch U2, measure the continuity between Point X and Points 1, 2, 3, and 4, for each of the appropriate jumper settings on JP1 and JP2
  • The terms "open" and "closed" refer to the jumpered status of JP1 and/or JP2. "Open" means not jumpered.
  • The nominal result of "X ---> 1" means there is continuity between the 2 points. See testpoints graphic below.
U2 Continuity Tests (only if necessary)

Test Measurements

TestpointUnitsNominal ValueAuthor'sYours
JP1&2 Closedk ohmU2: X --->1 (= 70-100)~64_______
JP1 Open, JP2 Closedk ohmU2: X --->2 (= 70-100)~64_______
JP1 Closed, JP2 Openk ohmU2: X --->3 (= 70-100)~64_______
JP1&2 Openk ohmU2: X --->4 (= 70-100)~64_______